x86 assembler section
In version 22 I have created Snowdrop OS's x86 assembler, because of three reasons. First, I wanted to have a low-level programming platform to complement Snowdrop's high-level BASIC interpreter. Second, I wanted to have faster access to hardware when interfacing with the circuits I've created. Third, I had never created an assembler before, so I was curious.
Naturally, the assembler is written in assembler. Its source code is organized into two areas. First, there's processor-agnostic symbol support, address resolution, tokenization, arithmetic, listing and binary generation, assembler API. Second, there's support for x86-specific opcodes, to make it actually useful.
I've organized the source this way to make it easier for myself in the future, if I ever decide to create assemblers for other processors.
The assembler can be invoked from two different applications:
The ASM application is invoked from the shell. It can write both binaries and listing files.
The ASMIDE application was branched from TEXTEDIT and allows for source code editing as well as the ability to assemble, view listing, and write binary to file.
When desired, the assembler produces listing files which can be viewed with applications such as FVIEW or FILEMAN.
Snowdrop OS x86 assembler documentation
Non-CPU specific symbols:
CONST, ORG, TIMES, DB, DW, $, $$
MOV:
supports sources: sreg16, reg, imm, mem
supports destination: sreg16, reg, mem
where mem can be [sreg16 : imm16] or [sreg16 : reg16]
examples: mov ax, word [cs : 1234h];
mov cl, byte [ds : si];
mov word [ds : si], 1100b;
mov al, byte [ss : 500];
All other two-operand opcodes:
support only sources: reg, imm
support only destinations: reg
Single operand opcodes support only: reg
Comment example:
See file ASMTEST.ASM for an example of a simple Snowdrop OS application.
List of supported x86 opcodes
General data transfer:
MOV, XCHG, XLAT, XLATB, CBW, CWD
Logic and arithmetic:
INC, DEC, MUL, IMUL, DIV, IDIV, ADD, OR, ADC, SBB, AND, SUB, XOR, ROL,
ROR, RCL, RCR, SHL, SAL, SHR, SAR
Conditional branching:
CMP, TEST, JMP, JO, JNO, JS, JNS, JE, JZ, JNE, JNZ, JB, JNAE, JC, JNB,
JAE, JNC, JBE, JNA, JA, JNBE, JL, JNGE, JGE, JNL, JLE, JNG, JG, JNLE, JP,
JPE, JNP, JPO, JCXZ, LOOP, LOOPE, LOOPZ, LOOPNE, LOOPNZ
Procedures:
CALL, RET, RETF, IRET, INT, INT3, INTO, LEAVE, RETN
Stack operations:
PUSH, POP, PUSHA, POPA, PUSHF, POPF
String operations:
MOVSB, LODSB, STOSB, CMPSB, SCASB, MOVSW, LODSW, STOSW, CMPSW, SCASW,
REP, REPE, REPNE, REPZ, REPNZ
Flag operations:
CLC, STC, CLI, STI, CLD, STD, CMC, SAHF, LAHF, SALC
Miscellaneous: