The next board I built is essentially an 8-output CMOS non-inverting buffer. It connects directly to the parallel port isolation board.
Its purpose is twofold: #1: to provide clean HIGH/LOW voltages (HIGH is extremely close to supply voltage, LOW is extremely close to 0V). #2: to interface with CMOS digital logic circuits.
The 66mV offset in the image below is due to the HIGH state lasting slightly longer than the LOW state.